Publications

Books and Book Chapters

1.      J. A. Starzyk, "Motivated Learning for Computational Intelligence, in Computational Modeling and Simulation of Intellect: Current State and Future Perspectives, edited by B. Igelnik, IGI Publishing, ch.11, pp. 265-292, 2011.

2.      J. A. Starzyk, Y. Liu, S. Batóg, "A Novel Optimization Algorithm Based on Reinforcement Learning”,  in `Computational Intelligence in Optimization-Applications and Implementations', Tenne, Yoel; Goh, Chi-Keong (Eds.), Springer, pp. 27-48, 2010.

3.      J. A. Starzyk, "Motivation in Embodied Intelligence"  in Frontiers in Robotics, Automation and Control, I-Tech Education and Publishing, Oct. 2008, pp. 83-110.

4.      J. A. Starzyk, “Topological Analysis and Diagnosis of Analog Circuits”, Wydawnictwa Politechniki Slaskiej, 2008, 140 pp.

  1.  J. A. Starzyk and A. El-Gamal, "Fault Location by Nodal Equations" in Analog Methods for Circuit Analysis and Diagnosis,  edited by T. Ozawa, Marcel Dekker, Inc., New York, 1988.

6.      J. A. Starzyk, "Advances in Circuits and Systems - Selected Papers on Analog Fault Diagnosis", (co-author), IEEE Press, New York 1987.

  1. J. A. Starzyk, "Topological Analysis of Large Electronic Circuits", Prace Naukowe, Elektronika, No. 55, WPW, Warszawa, 1981, (in Polish), 184 pp.

8.      Co‑author of Polish translation "Computer‑aided analysis of electronic circuits, algorithms and computational techniques", by L.O. Chua and P.M. Lin, Wydawnictwa Naukowo‑Techniczne, Warszawa, 1981.

9.      "Introduction to Computer Design and Analysis of Electronic Networks", (Co‑author), Wydawnictwa PW, Warszawa, 1978 (in Polish).

Articles in Professional Journals

  1. V. A. Nguyen, J. A. Starzyk and W-B. Goh,"Dynamic averaging of aligned sequences: A Long-Term Memory approach" - IEEE Trans. on Systems, Man and Cybernetics, Part B (under review).
  2. J. A. Starzyk, and Basawaraj, “Memristor Crossbar Architecture in Neural Network Memories”, submitted to IEEE Trans. Circuits and Systems, Part I, 2013.
  3. J. Graham, J. A. Starzyk, and D. Jachyra, “Opportunistic Behavior in Motivated Learning Agents”,  submitted to IEEE Trans on Neural networks and Learning Systems, 2013.
  4. J. A. Starzyk, and Basawaraj, “Neural Network Learning Using Memristors”, submitted to IEEE Trans on Neural Networks and Learning Systems, 2013.
  5. V. A. Nguyen, J. A. Starzyk and W-B. Goh,"A Spatio-temporal Long-term Memory Approach for Visual Place Recognition in Mobile Robotic Navigation" - Robotics and Autonomous Systems, Elsevier (accepted).
  6. P. Moghadam, J. A. Starzyk, and W. S. Wijesoma, "Opponency Based Local Dominant Orientation Estimation Using Population Coding", Computer Vision and Image Understanding, (under review).
  7. W. Wang, B. Subagdja, A.-H. Tan, and J. A. Starzyk, “Neural Modeling of Episodic Memory: Encoding, Retrieval, and Forgetting” IEEE Trans. on Neural Networks and Learning Systems, vol. 23, no. 10, Oct. 2012, pp. 1574 - 1586.
  8. T. Huang, C. Li, S. Duan, and J. A. Starzyk, "Robust exponential stability of uncertain delayed neural networks with stochastic perturbation and impulse effects" IEEE Trans. on Neural Networks and Learning Systems, vol. 23 , no. 6 , June 2012, pp.  866 – 875.
  9. V. A. Nguyen, J. A. Starzyk, W-B. Goh, D. Jachyra, “Neural Network Structure for Spatio-Temporal Long-Term Memory” IEEE Trans. on Neural Networks and Learning Systems, vol. 23 no. 6, June, 2012, pp. 971-983.
  10. P. Moghadam, J. A. Starzyk, and W. S. Wijesoma, "Fast Vanishing Point Detection in Unstructured Environments" IEEE Trans. on Image Processing, vol. 21, no. 1, Jan 2012, pp. 425-430.
  11. J. A. Starzyk, J. T. Graham, P. Raif, and A-H.Tan, “Motivated Learning for Autonomous Robots Development”, Cognitive Science Research, v.14, no.1, 2012, p.10(16) pp. 10-25.
  12. J. A. Starzyk and D. K. Prasad, “A Computational Model of Machine Consciousness” International Journal of Machine Consciousness, vol. 3, No. 2 , (2011) pp. 255-281.
  13. J. A. Starzyk, H. He, “Spatio-Temporal Memories for Machine Learning: A Long-Term Memory Organization ”, IEEE Trans. on Neural Networks, vol. 20, no. 5, May 2009, pp. 768 - 780.
  14. H. He, X. Shen, J. A. Starzyk, ”Power Quality Disturbances Analysis Based on EDMRA Method”, accepted for Int. Journal of Electrical Power & Energy Systems, vol. 31 (6), pp. 258-268, May 2009.
  15. Y. Liu, J. A. Starzyk, Z. Zhu, “Optimized Approximation Algorithm in Neural Network without Overfitting”, IEEE Trans. on Neural Networks, vol. 19, no. 4, June, 2008, pp. 983-995.
  16. H. F. A. Hamed, S. Kaya, J. A. Starzyk, “Use of nano-scale double-gate MOSFETs in low-power tunable current mode analog circuitsAnalog Integrated Circuits and Signal Processing, Feb., 2008.

18.  J. A. Starzyk, and H. He, “Anticipation-Based Temporal Sequences Learning in Hierarchical Structure”, IEEE Trans. on Neural Networks, vol. 18,  no. 2,  March 2007, pp. 344 – 358.

19.  J. A. Starzyk and H. He, “A Novel Low Power Logic Circuit Design Scheme,” IEEE Trans. Circuits Syst. II, vol. 54, no. 2, pp.176-180, Feb. 2007.

20.  Z. Zhu, F. van Graas and J. A. Starzyk, “GPS signal acquisition using the repeatability of successive code phase measurements” GPS Solutions, Springer, May 2007.

21.  S. Kaya, H. F. A. Hamed and J. A. Starzyk, “Low-Power Tunable Analog Circuit Blocks Based on Nanoscale Double-Gate MOSFETs,” IEEE Trans. Circuits Syst. II, vol. 54, no. 7, July 2007, pp. 571-575.

22.  J. A. Starzyk, H. He, and Y. Li, “A Hierarchical Self-organizing Associative Memory for Machine Learning”, Lecture Notes in Computer Science 4491: pp. 413-423, 2007.

23.  J. A. Starzyk, Y. Liu, D. Vogel, ”Sparse Coding in Sparse Winner Networks”, Lecture Notes in Computer Science 4492: pp. 534-541, 2007.

24.  Z. Zhu, H. He, J.A. Starzyk, and C. Tseng “Self-Organizing Learning Array and its Application to Economic and Financial Problems” Elsevier Science, Information Sciences, vol. 177, no 5, 1 March 2007, Pages 1180-1192.

25.  J. A. Starzyk, M. Ding, Y. Liu, ”Hybrid Pipeline Structure for Self-Organizing Learning Array”, Lecture Notes in Computer Science, 2007.

26.  H. He, and J. A. Starzyk, “Online Dynamic Value System for Machine Learning”, Lecture Notes in Computer Science 4491: pp. 441-448, 2007.

  1. J. A. Starzyk, Z. Zhu, and Y. Li, "Associative Learning in Hierarchical Self Organizing Learning Arrays“, IEEE Trans. Neural Networks, vol.17, no. 6, pp.1460-1470, Nov. 2006.

28.  H. He and J. A. Starzyk, "A Self Organizing Learning Array System for Power Quality Classification based on Wavelet Transform", IEEE Trans. on Power Delivery, Jan. 2006.

29.  J. A. Starzyk, Y. Guo, Z. Zhu, ”Dynamically reconfigurable neuron architecture for the implementation of self-organising learning array”, International Journal of Embedded Systems, Vol. 2, Number 1-2 / 2006 ,pp. 95-105.

  1. J. A. Starzyk, Z. Zhu and T.-H. Liu, „Self-Organizing Learning Array”, IEEE Trans. on Neural Networks, vol. 16, no. 2, pp. 355-363, March 2005.  
  2. J. A. Starzyk, Z. Zhu, and Y. Li, "Associative Learning in Hierarchical Self Organizing Learning Arrays", Artificial Neural Networks: Biological Inspirations. Lecture Notes in Computer Science 3696: pp. 91-96, 2005.

32.  Janusz A. Starzyk, and Yue Li, David D. Vogel, "Neural Network with Memory and Cognitive Functions", Artificial Neural Networks: Biological Inspirations. Lecture Notes in Computer Science 3696: pp. 85-90, 2005.

  1. J. A. Starzyk, Dong Liu, Zhi-Hong Liu, D. Nelson, and J. Rutkowski, “Entropy-based optimum test points selection for analog fault dictionary techniques,” IEEE Transactions on Instrumentation and Measurement, vol. 53, no. 3, June 2004, pp. 754-761.

34.  J. A. Starzyk and F. Wang, "Dynamic Probability Estimator for Machine Learning" IEEE Trans. on Neural Networks, vol.15, no 2, March 2004, pp.298-308.  

35.  J. A. Starzyk, R. P. Mohn, and L. Jing, L., "A Cost-Effective Approach to the Design and Layout of a 14-b Current-Steering DAC Macrocell", IEEE Trans. on Circuits and Systems I: Fundamental Theory and Applications, Vol. 51 ,  no. 1 , Jan. 2004, pp. 196 - 200.

36.  D. E. Nelson, J. A. Starzyk, and D. D. Ensley, "Iterated wavelet transformation and signal discrimination for HRR radar target recognition",  IEEE Trans. on Systems, Man and Cybernetics, Part A  ,Vol. 33 , no.1 , Jan. 2003 , pp. 52 - 57.

37.  D. Liu and J. A. Starzyk, " A generalized fault diagnosis in dynamic analog circuits" Int. Journal of Circuit Theory and Applications, vol. 30, 2002, pp. 487-510.

38.  D. E. Nelson, J. A. Starzyk, and D. D. Ensley, "Iterative Wavelet Transformation and Signal Discrimination for HRR Radar Target Recognition," Multidimensional Systems and Signal Processing, Vol. 14, no.2. 2002.

39.  J. Becker, A. Alsolaim, M. Glesner, and J. Starzyk, “A Parallel Dynamically Reconfigurable Architecture for Flexible Aplication-Tailored Hardware/Software Systems in Future Mobile Communication”, The Journal of Supercomputing, Erratum Vol. 23, 132, 2002,  19(1): 105-127 (2001).

40.  J. Pang and J. A. Starzyk, "Fault Diagnosis in Mixed-Signal Low Testability System" An Int. Journal of Analog Integrated Circuits and Signal Processing, vol. 28, no.2, August 2001, pp. 159-170.

41.  J. A. Starzyk and Y.-W. Jan, and F. Qiu, "A DC-DC Charge Pump Based on Voltage Doublers", IEEE Trans. Circuits and Systems, Part I, vol. 48, no. 3, March 2001, pp. 350-359.

42.  G. N. Stenbakken, D. Liu J. A. Starzyk, and B. C. Waltrip, "Nonrandom Quatization Errors in Timebases", IEEE Trans. on Instrumentation and Measurement, vol. 50, no. 4, Aug. 2001, pp.888-892.

43.  J. A. Starzyk, D. E. Nelson, and K. Sturtz, " A Mathematical Foundation for Improved Reduct Generation in Information Systems", Journal of Knowledge and Information Systems, v. 2 n. 2, March 2000 p.131-146.

44.  J. A. Starzyk, J. Pang, S. Manetti, G. Fedi, and C. Piccirilli, "Finding Ambiguity Groups in Low Testability Analog Circuits", IEEE Trans. Circuits and Systems, Part I, vol 47, no. 8, 2000, pp. 1125-1137.

45.  G. Fedi, S. Manetti, J. A. Starzyk, M. C. Piccirilli "Determination of an Optimum Set of Testable Components in the Fault Diagnosis of Analog Circuits", IEEE Trans. Circuits and Systems, Part I, vol. 46, no.7, 1999, 779-787.

46.  J. A. Starzyk, D. E. Nelson, and K. Sturtz, "Reduct Generation in Information Systems", Bulletin of International Rough Set Society, 1999, 3 (1/2).

47.  J. A. Starzyk, "Hierarchical Analysis of High Frequency Interconnect Networks", IEEE Trans. on Computer Aided Design of Integrated Circuits and Systems, vol.13, no.5, 1994, pp. 658-664.

48.  J. A. Starzyk and X. Fang, "A CMOS Current Mode Winner-Take-All Circuit with both Excitatory and Inhibitory Feedback", Electronics Letters, vol. 29,  no. 10, 1993, pp. 908-910.

49.  G. N. Stenbakken and J. A. Starzyk, "Diakoptic and Large Change Sensitivity Analysis", IEE Proc. G, Circuits, Devices and Systems, vol. 139, no.1, 1992, pp.114-118.

50.  J. A. Starzyk and H. Dai, "A Decomposition Approach for Testing Large Analog Networks," Journal of Electronic Testing - Theory and Applications, no.3, 1992, pp. 181-195.

51.  J. A. Starzyk and A. Konczykowska, "Flowgraph Analysis of Large Electronic Networks", IEEE Trans. on Circuits and Systems, vol. CAS-33, 1986.

52.  J. A. Starzyk and E. Sliwa, "Upward Topological Analysis of Large Circuits Using Directed Graph Representation", IEEE Trans. on Circuits and Systems, vol. CAS-31, 1984, pp. 410-414.

53.  A. E. Salama, J. A. Starzyk and J. W. Bandler, "A Unified Decomposition Approach for Fault Location in Large Analog Circuits", IEEE Trans. on Circuits and Systems, vol. CAS-31, 1984, pp. 609-622.

54.  J. A. Starzyk, R. M. Biernacki and J. W. Bandler, "Evaluation of Faulty Elements within Linear Subnetworks", Int. Journal of Circuit Theory and Applications, vol. 12, 1984, pp. 23-37.

55.  J. A. Starzyk and J. W. Bandler, "Multiport Approach to Multiple-Fault Location in Analog Circuits", IEEE Trans. on Circuits and Systems, vol. CAS-30, 1983, pp. 762-765.

56.  J. A. Starzyk, "An Efficient Cluster Algorithm", Acta Polytechnica, CVUT, Praha, 1981, pp. 49-55.

57.  J. A. Starzyk, "Signal Flow-Graph Analysis by Decomposition Method", IEE Proc. on Electronic Circuits and Systems, No. 2, April 1980, pp. 81-86.

58.  G. Centkowski and J. A. Starzyk, "Topological Synthesis of LLF Networks", Acta Polytechnica, CVUT, Praha, 1980, pp. 77-86.

59.  J. A. Starzyk and E. Sliwa, "Hierarchic Decomposition Method for the Topological Analysis of Electronic Networks", Int. Journal of Circuit Theory and Applications, Vol. 8, 1980, pp. 407-417.

60.  J. A. Starzyk, "Generation of Complete Trees by the Method of Modified Structural Matrix", Arch. Elektrot., z.4, 1978, (in Polish), pp. 843-852.

61.  J. A. Starzyk, "New Method for Designing Complete Trees of a Pair of Conjugate Graphs", Arch. Elektrot., z.1, 1977, (in Polish), pp. 41-46.

62.  J. A. Starzyk, "Application of the Controlled Expansions Method to the Topological Analysis of Circuits", Arch. Elektrot., z.1, 1977, (in Polish), pp. 47-58.

63.  J. A. Starzyk, "Determination of the Nullator-Norator Graph's Complete Trees", Radio Electronics and Communication Systems, t.XX 12, 1977, (in Russian), pp. 9-15.

64.  J. A. Starzyk, and J. Wojciechowski, "Topological Analysis and Synthesis of Electrical Networks by the Method of Structural Numbers", Raport Naukowy IPE, Warszawa, 1977, (in Polish).

65.  J. A. Starzyk, "Topological Synthesis of Linear Active Networks Described by Multivariable Functions", Arch. Elektrot., z.2, 1976, (in Polish), pp. 287-295.

66.  J. A. Starzyk, "Topological Methods of Analysis of LSL Networks with Nullators and Norators", Prace Naukowe PW, Elektronika, No. 20, Warszawa, 1975, (in Polish), pp. 73-89.

67.  J. A. Starzyk, "Topological, Analysis of LSL Networks with Nullators and Norators; Impedance Dependencies", Prace Naukowe PW, Elektronika, No. 20, Warszawa, 1975, (in Polish), pp. 61-71.

68.  J. A. Starzyk, "Complement of Columns of Constant-row Structural Number to the Factorizable Number", Arch. Elektrot., z.2, 1975 (in Polish), pp. 237-244.

69.  A. Konczykowska and J. A. Starzyk "Determination of Structural Number of a Partitioned Graph. Part I and II.", Arch. Elektrot z.2, 1975, (in Polish), pp. 245-262.

Conference proceedings and presentations

  1. J. A. Starzyk, J. Graham, and L. Puzio, “Simulation of a Motivated Learning Agent”, Int. Work Conf. on Artificial Neural Networks, Puerto de la Cruz , Tenerife, 12-14 June 2013.
  2. J. A. Starzyk and Basawaraj, “Comparison of two memristor based neural network learning schemes for crossbar architecture”, Int. Work Conf. on Artificial Neural Networks, Puerto de la Cruz , Tenerife, 12-14 June 2013.
  3. J. A. Starzyk, and P. Raif, “Cognitive Agent and its Implementation in the Blender Game Engine Environment” IEEE Symposium Series on Computational Intelligence, Singapore, 16-19 April, 2013.
  4. J. Graham, and J. A. Starzyk, “Transitioning From Motivated to Cognitive Agent Model” IEEE Symposium Series on Computational Intelligence, Singapore, 16-19 April, 2013.  
  5. Vu-Anh Nguyen, Janusz A. Starzyk and Wooi-Boon Goh, “Sequence Recognition with Spatio-Temporal Long-Term Memory Organization”, Int. Joint Conf. on Neural Networks, Brisbane, Australia, June 10-15, 2012.
  6. Basawaraj, J. A. Starzyk, and M. Jaszuk,” A Question Answer Approach to Building Semantic Memory“, 11th Int. Conf. on Artificial Intelligence and Soft Computing, ZakopanePoland, Apr 29, May 3, 2012.
  7. X. Xu, J. Graham, Basawaraj, J.J. Zhu, J.A. Starzyk, P. Zhang, “A Biopsychically Inspired Cognitive System for Intelligent Entomopters” in AIAA Infotech @Aerospace 2012 Conference. Garden Grove, CA USA. 19 - 21 June 2012.
  8.  J. Graham, J. A. Starzyk, D. Jachyra, “Opportunistic Motivated Learning Agents”, 11th Int. Conf. on Artificial Intelligence and Soft Computing, ZakopanePoland,  LNCS 7268, Apr 29-May 3, pp. 442-449, 2012.
  9.  J.A. Starzyk, “Mental Saccades in Control of Cognitive Process”, Int. Joint Conf. on Neural Networks, San Jose, CA, July 31 - August 5, 2011.
  10. J.A. Starzyk, P. Raif, “Motivated Learning in Autonomous Systems”, Int. Joint Conf. on Neural Networks, San Jose, CA, July 31 - August 5, 2011.
  11. S. Carpenter, X. Yu, M. Altun, J. Graham, J. J. Zhu, J. A. Starzyk, “Vision Guided Motion Control of a Biomimetic Elastic Cable Driven Quadruped Robot -The RoboCat” IMECE, Int. Mechanical Engineering Congress., Denver, CO, Nov. 11-17, 2011.
  12. D. K. Prasad, and J. A. Starzyk, “Object detection and representation in motivated conscious”, Decade of the Mind VI Conf., Singapore, Oct. 18-22, 2010.
  13. P. Moghadam, J. A. Starzyk, and W. S. Wijesoma, “Computational model of driver gaze direction”, Decade of the Mind VI Conf., Singapore, Oct. 18-22, 2010.
  14. D. K. Prasad, and J. A. Starzyk, “A Perspective on Machine Consciousness”, The Second Int. Conf. on Advanced Cognitive Technologies and Applications, Lisbon, Portugal, Nov. 21-26, 2010.
  15. J.A. Starzyk, P. Raif, and A.-H. Tan, “Mental Development and Representation Building through Motivated Learning” , WCCI 2010 - Special Session on Mental Architecture and Representation, Barcelona, Spain, July 18-23, 2010.
  16. J. A. Starzyk and D. Prasad, “Machine Consciousness: A Computational Model” Third International ICSC Symposium on Models of Consciousness, BICS 2010, Madrid, Spain, 14-16 July, 2010.
  17. W. Wang, B. Subagdja, A.-H. Tan, and J.A. Starzyk, “A Self-Organizing Approach to Episodic Memory Modeling”, The 2010 IEEE World Congress on Computational Intelligence, Barcelona, Spain, July 18-23, 2010.
  18. V. A. Nguyen, J. A. Starzyk, A. L. P. Tay and W. B. Goh, “Spatio-Temporal Sequence Learning of Visual Place Cells for Robotic Navigation”, The 2010 IEEE World Congress on Computational Intelligence, Barcelona, Spain, July 18-23, 2010.

15.  J.A. Starzyk, “Water Resource Planning and Management using Motivated Machine Learning”, 10th Kovacs Colloquium UNESCO, Hydrocomplexity: New Tools for Solving Wicked Water, Paris, France, July 2010, pp 214-220.

16.  J. A. Starzyk, P. Raif, A.-H. Tan, “Motivated Learning as an Extension of Reinforcement Learning”, 4th Int. Conf. on Cognitive Systems, ETH Zurich, Switzerland, Jan. 27-28, 2010.

17.  J. A. Starzyk and Basawaraj,  “Self Organizing Neural Network for Question Answering“ Thirteenth  International Conference on Cognitive and Neural Systems (ICCNS), Boston University, May 27-30, 2009.

18.  J. A. Starzyk and J. Graham “A Goal Creation System With Curiosity” Thirteenth  International Conference on Cognitive and Neural Systems (ICCNS), Boston University, May 27-30, 2009.

19.  J. A. Starzyk, Xinming Yu, “Correlation-based neural network for active vision” Thirteenth  International Conference on Cognitive and Neural Systems (ICCNS), Boston University, May 27-30, 2009.

20.  J. A. Starzyk, P. Raif, “Motivated Learning Based On Goal Creation in Cognitive Systems” Thirteenth  International Conference on Cognitive and Neural Systems (ICCNS), Boston University, May 27-30, 2009.

21.  J.A. Starzyk, “Motivated Machine Learning for Water Resource Management”, Workshop on Integrated Modelling Approaches to Support Water Resource Decision Making: Crossing the Chasm, UNESCO-Paris, 20-21 April 2009.

22.  J. A. Starzyk and Basawaraj,  “Hierarchical Neural Network for Text Based Learning”, Twelfth International Conference on Cognitive and Neural Systems (ICCNS), Boston University, May 14-17, 2008.

23.  J. Graham and J. A. Starzyk, “Self-Organizing Hierarchical Neural Network with Correlation Based Sparse Connections”, Twelfth International Conference on Cognitive and Neural Systems (ICCNS), Boston University, May 14-17, 2008.

24.  J. A. Starzyk, Yinyin Liu, “Attention aided perception in sparse-coding networks”, Twelfth International Conference on Cognitive and Neural Systems (ICCNS), Boston University, May 14-17, 2008.

25.  J. A. Starzyk, Xinming Yu, “Active vision system for embodied intelligence based on retina sampling model”, Twelfth International Conference on Cognitive and Neural Systems (ICCNS), Boston University, May 14-17, 2008.

26.  J. Graham and J. A. Starzyk, “A Hybrid Self-organizing Neural Gas Based Network”, IEEE World Congress on Computational Intelligence, Hong Kong, June 2008.

27.  H. He, S. Chen, . Y. Cao, and  J. A. Starzyk, “Incremental Learning for Machine Intelligence”, Twelfth International Conference on Cognitive and Neural Systems (ICCNS), Boston University, May 14-17, 2008.

28.  Y. Liu, J. A. Starzyk, and Z. Zhu, “Optimizing number of hidden neurons in neural networks”, Proc. Int. Conf. Artificial Intelligence and Applications, AIA’2007, Innsbruck, Austria, Feb. 12 – 14, 2007.

29.  J. A. Starzyk, Y. Liu, “Hierarchical spatio-temporal memory for machine learning based on laminar minicolumn structure,” Eleventh International Conf. on Cognitive and Neural Systems, Boston University, May 16-19, 2007.

30.  J.A.Starzyk, Yinyin Liu, and Haibo He, “Challenges of Embodied Intelligence”, Proc. Int. Conf. on Signals and Electronic Systems, ICSES'06, Lodz, Poland, Sep. 17-20, 2006.

31.  S. Kaya, H. Hamed and J. A. Starzyk, “Low-Power Tuneable Analog Circuit Blocks Based on Nanoscale Dual-Gate MOSFETs”, 6th IEEE Conf. on Nanotechnology – IEEE Nano 2006, 16-20 July, 2006, Cincinnati, OH, USA.

32.  S. Kaya, H. Hamed and J. A. Starzyk, “Compact Tunable Current-Mode Analog Circuits Using DGMOSFETs”, IEEE Int. SOI Conf. Oct. 2–5, 2006, Niagara Falls, NY.

33.  J.A.Starzyk, Mingwei Ding, Haibo He, "Optimized Interconnections in Probabilistic Self-Organizing Learning", Proc. IASTED Int. Conf. on Artificial Intelligence and Applications, Innsbruck, Austria, Feb. 14-16, 2005.

34.  J. A. Starzyk,Y. Guo, and Z. Zhu, ”Dynamically Reconfigurable Neuron Architecture for the Implementation of Self-Organizing Learning Array”, Proc. 18th Int. Parallel and Distributed Processing Symposium, Santa Fe, New Mexico, April 26– 30, 2004.

35.  H. He, J. A. Starzyk, "DesignPower Quality Disturbances Analysis based on Wavelet Multiresolution Decomposition", American Mathematical Society (AMS) Conf., Ohio University, Athens, OH, March 26-27, 2004.

36.  J. A. Starzyk, Y. Guo, Z. Zhu, “SOLAR and its hardware development",  Proc. Computational Intelligence and Natural Computing, 2003 (CINC’03),  2003, Cary, North Carolina USA , Sept. 26-30, 2003.

37.  J. A. Starzyk, Zhen Zhu, H. He and Zhineng Zhu, "Self-Organizing Learning Array and Its Application to Economic and Financial Problems, "Proc.  Joint Conference on Information Systems, 2003, Cary, North Carolina USA, Sept. 26-30, 2003.

38.  J. A. Starzyk and T.-H. Liu, “Design of a Self-Organizing Learning Array System”, Proc. IEEE Int. Symposium on Circuits and Systems, May 26-29, Bangkok, Thailand, 2003.

39.  J. A. Starzyk and R. Mohn, “Cost-Oriented Design of a 14-bit Current Steering DAC Macrocell”, Proc. IEEE Int. Symposium on Circuits and Systems, May 26-29, Bangkok, Thailand, 2003.

40.  Alaqeeli, J. A. Starzyk, F. van Graas, “Real Time Acquisition and Tracking for GPS Receiver”, Proc. IEEE Int. Symposium on Circuits and Systems, May 26-29, Bangkok, Thailand, 2003.

41.  J. A. Starzyk, and Y. Guo, “Dynamically Self-Reconfigurable Machine Learning Structure for FPGA Implementation” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)  Las Vegas, Nevada, USA, June 23 - 26, 2003.

42.  J. Pang and J.A. Starzyk, ”Fast Direct GPS Signal Acquisition Using FPGA”, Proc. (Krakow, Poland, 2003).

43.  J. A. Starzyk, and Y. Guo, “A Self-Organizing Learning Array and its Hardware-Software Co-Simulation”, Proc. ECCTD, (Krakow, Poland, 2003).

44.  J. A. Starzyk and D. Liu, "A Decomposition Method for Analog Fault Location", IEEE Int. Symposium on Circuits and Systems, May 26-29, Scottsdale, Arizona, 2002.

45.  J. A. Starzyk and D. Liu, "Locating Stuck-at Faults in Analog Circuits", IEEE Int. Symposium on Circuits and Systems, May 26-29, Scottsdale, Arizona, 2002.

46.  J. Starzyk and Z. Zhu, "Software Simulation of a Self-Organizing Learning Array System", The 6th IASTED Int. Conf. Artificial Intelligence & Soft Comp.(ASC 2002), July 17-19, 2002, Banff, Alberta, Canada.

47.  J. Pang, J. A. Starzyk, "P-code Generator FPGA Design for Direct GPS P(Y)-Code Acquisition", 12th International Conference on Field Programmable Logic and Applications (FPLA), 2002.

48.  M. Ding, A. Alsolaim, and J. Starzyk, "Designing and Mapping of a Turbo Decoder for 3G Mobile Systems Using Dynamically Reconfigurable Architecture " Engineering of Reconfigurable Systems and Algorithms, ERSA'02, The Int. Multi Conference in Computer Science, June 24-27, Las Vegas, Nevada, 2002.

49.  J. A. Starzyk Y. Guo, "A Self Organized Classifier Based on Maximum Information Index and its Develpoment Using VHDL", 2002 IEEE Int. Symposium on Intelligent Signal Processing and Communication Systems, 21-24 November 2002, Kaohsiung, Taiwan, R.O.C. 2002.

50.  J.A. Starzyk and D. Liu, "A new approach to multiple fault diagnosis in linear analog circuits," Proceeding of the 7th IEEE International Mixed Signal Testing Workshop (IMSTW), Atlanta, GA, Jun. 2001.

51.  J. A. Starzyk* and D. Liu, "A Method for Multiple Fault Diagnosis in Analog Circuits" Proc. Southeastern Symposium on System Theory, (Athens, OH, 18-20, March 2001),   pp. 65 - 68

52.  J. A. Starzyk and L. Jing, "Analog Circuits for Self Organizing Neural Networks Based on Mutual Information" Proc. Southeastern Symposium on System Theory, (Athens, OH, 2001).

53.  Y. Zeng and J. A. Starzyk, "Statistical Approach for Clustering in Pattern Recognition" Proc. Southeastern Symposium on System Theory, (Athens, OH, 2001).

54.  A. Alaqeeli and J. A. Starzyk, "Hardware Implementation of Fast Convolution for GPS Signal Acquisition Using FPGA" Proc. Southeastern Symposium on System Theory, (Athens, OH, 2001).

55.  A.Alsolaim and J. A. Starzyk, "Dynamically Reconfigurable Solution in the Digital Baseband Processing for Future Mobile Radio Devices" Proc. Southeastern Symposium on System Theory, (Athens, OH, 2001).

56.  D. E. Nelson and J. A. Starzyk, "High Range Resolution Radar Signal Classification: A Partitioned Rough Set Approach" Proc. Southeastern Symposium on System Theory, (Athens, OH, 2001).

57.  J. A. Starzyk and Y. Guo, "An Entropy-based Learning Hardware Organization Using FPGA" Proc. Southeastern Symposium on System Theory, (Athens, OH, 2001).

58.  J. A. Starzyk and D. Liu, "Multiple Fault Diagnosis of Analog Circuits Based on Large Change Sensitivity Analysis" Proc. ECCTD, (Espoo, Finland, Aug. 2001).

59.  D. E. Nelson and J. A. Starzyk, "High Range Resolution Radar - Extensions to Rough Set Theory for Automatic Target Recognition", SPIE 15th Annual Int. Symp. on Aerospace/Defense Sensing Simulation and Controls, (Orlando FL, April 2001) Best Paper award.

60.  J. A. Starzyk and D. Liu, "Multiple Fault Diagnosis of Analog Circuits by Locating Ambiguity Groups in Test Equation", Proc. IEEE Int. Symp. Circuits and Systems (Sydney, Australia, 2001). 6-9 May 2001, pp. 199 - 202 vol. 5

61.  J. A. Starzyk and Z. Zhu, "Averaging Correlation for C/A Code Acquisition and Tracking in Frequency Domain", Proc. Midwest Symp. on Circuits and Systems (Dayton, OH, Aug. 2001).

62.  J. A. Starzyk and Y. Guo, "Reconfigurable Self-Organizing NN Design Using Virtex FPGA", Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (Las Vegas, NV, June 2001).

63.  X. S. Song and J. A. Starzyk, "Feature Selection using Mutual Information and Statistical Techniques", Proc. 2001 IEEE Military Communications Conf. (MILCOM’2001), Washington D.C, October 2001.

64.  Zhou Q., Chelberg, D., Zeng Y., and Starzyk, J. “Robust Optical Flow Estimation Using Invariant Feature”, Proc. Southeastern Symp. on System Theory, (Athens, OH, 2001),  Mar 2001,  pp. 263 – 267.

65.  A. Alsolaim, J. Becker, M. Glesner, and J. Starzyk, "A Dynamically Reconfigurable System-on-a chip Architecture for Future Mobile Digital Signal Processing", The European Signal Processing Conference EUSIPCO, (Sept. 5 - 8, 2000, Tampere, Finland).

66.  J. Becker, M. Glesner, A. Alsolaim, J. Starzyk, "Fast Communication Mechanisms in Coarse-grained Dynamically Reconfigurable Array Architectures", the 2000 Int. Conf. on Parallel and Distributed Processing Techniques and Apllications, (Las Vegas, NV, June 2000).

67.  A. Alsolaim, J. Becker, M. Glesner, J. Starzyk. "Dynamically Reconfigurable Array Architecture for Future Mobile Digital Baseband Processing." 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), April 16-19, 2000, Napa Valley, California.

68.  Y. Zeng and J. Starzyk, "Piecewise Linear Approach: a New Approach in Automatic Target Recognition," SPIE 14th Annual Int. Symp. on Aerospace/Defense Sensing Simulation and Controls, (Orlando FL, April 2000).

69.  J. Starzyk, J. Pang, "Fault Diagnosis in Analog and Mixed Mode Low Testability Systems", Proc. IEEE Int. Symp. Circuits and Systems (Geneva, Switzerland, 2000).

70.  D. E. Nelson and J. A. Starzyk "Fusing Marginal Reducts for HRR Target Identification" 4th World Multi-Conference on Systems, Cybernetics and Informatics (SCI2000), (Orlando, Florida, July 2000), pp. 452-460 Best Paper award.

71.  G. N. Stenbakken, D. Liu J. Starzyk, and B. C. Waltrip, "Nonrandom Quatization Errors in Timebases", Proc. IEEE Instrumentation and Measurement Technology Conference (Baltimore, MD May 2000).

72.  J. Starzyk and J. Pang, "Evolvable Binary Artificial Neural Network for Data Classification", the 2000 Int. Conf. on Parallel and Distributed Processing Techniques and Apllications, (Las Vegas, NV, June 2000).

73.  F. Qiu, J. A. Starzyk and Y.-W. Jan, "Analog VLSI Design of Multi-phase Voltage Doublers with Frequency Regulation", the 1999 Southwest Symposium on Mixed-Signal Design, (Tucson, AZ, April, 1999).

74.  J. A. Starzyk and Y.-W. Jan," A Simulation Program Emphasized on DC Analysis of VLSI Circuits: SAMOC", the 1999 Southwest Symposium on Mixed-Signal Design, (Tucson, AZ, April, 1999).

75.  G. N. Stenbakken, D. Liu, J. A. Starzyk and B. C. Waltrip, "A new method to compensate quantized time-base nonlinearity of sampling instruments," Workshop on Software Embedded Systems Testing (WSEST), National Institute of Standards and Technology, Gaithersburg, MD, Nov. 1999.

76.  V. Brygilevicz, J. Wojciechowski, and J. A. Starzyk, "Testing of Analog Dynamic Systems Based on Integral Sensisitivity", Proc. ECCTD, (Stresa, Italy, Aug. 1999).

77.  J.A. Starzyk, J. Pang, G. Fedi, R. Giomi, S. Manetti, "A Software Program for Ambiguity Group Determination in Low Testability Analog Circuits", Proc. ECCTD, (Stresa, Italy, Aug. 1999).

78.  R. Morawski, B. Manhire, and J. Starzyk, "Engineering Education in Poland", ASEE Conf., Seattle, June, 1998.

79.  J. A. Starzyk, D. E. Nelson, and K. Sturtz, "Reduct Generation in Information Systems", The Sixth Int. Workshop on Rough Sets, Data Mining and Granular Computing, at JCIS'98, (Research Triangle Park, NC), Oct. 1998.

80.  D. E. Nelson and J. A. Starzyk, "Advanced Feature Selection Methodology for Automatic Target Recognition", Proc. Southeastern Symposium on System Theory, (Coolville, TN, 1997).

81.  Z-H. Liu and J. A. Starzyk, "Mixed Signal Testing of Analog Components on Printed Circuit Boards", Proc. Midwest Symp. on Circuits and Systems (Sacramento, CA, 1997).

82.  J. A. Starzyk and J. Zou, "Direct Symbolic Analysis of Analog Networks", Proc. Midwest Symp. on Circuits and Systems (Ames, Iowa, 1996).

83.  J. A. Starzyk and Ying-Wei Jan, "A Voltage Based Winner Takes All Circuit for Analog Neural Networks", Proc. Midwest Symp. on Circuits and Systems (Ames, Iowa, 1996).

84.  J. A. Starzyk and D. Nelson, "Independent Classifiers in Ontogenic Neural Networks for ATR", Adaptive Distributed Parallel Computing Symposium (Fairborn, OH, 1996).

85.  J. A. Starzyk and S. Chai, "Object representation using Fourier descriptors in pattern classification", Proc. Artificial Neural Networks in Engineering Conf. (St. Louis, MO, 1995).

86.  J. A. Starzyk and Ying-Wei Jan, "Low Power Voltage Based Winner Takes All Circuit for Analog Neural Networks", OAI Neural Network Symposium, (Athens, OH, 1995).

87.  J. A. Starzyk and Xingyuan Lee, "Rapid Object Identification Based on Fourier Descriptors", OAI Neural Network Symposium, (Athens, OH, 1995).

88.  X. Fang and J. A. Starzyk, "VLSI design of neural network based image processor", Proc. Southeastern Symposium on System Theory, (Athens, OH, 1994).

89.  J. A. Starzyk and Y-W. Jan, "Algorithm and architecture for feature extraction in image processong", Proc. Southeastern Symposium on System Theory, (Athens, OH, 1994).

90.  J. A. Starzyk and S. Chai, "Supervised learning with potentials for neural network- based object recognition", Proc. Southeastern Symposium on System Theory, (Athens, OH, 1994).

91.  J. A. Starzyk and C-H. Chen, "A VLSI inner-product processor for real-time DSP applications", Proc. Southeastern Symposium on System Theory, (Athens, OH, 1994).

92.  J. A. Starzyk and M. SenthilKumar, "Partial arithmetic - algorithms and architecture", Proc. Southeastern Symposium on System Theory, (Athens, OH, 1994).

93.  J. A. Starzyk, Z. H. Liu, and J. Zou, "An organization of the test bus for analog and mixed-signal systems", Proc. of IEEE VLSI Test Symposium, (Cherry Hill, N.J. 1994).

94.  X. Fang and J. Starzyk, "A novel winner-take-all circuit", the World Conf. on Neural Networks, (Portland, OR, 1993).

95.  J. A. Starzyk and J. Zou, "On-line error detection in analog and mixed-signal systems", IEEE Int. Test Conference, (Baltimore, MD, 1993).

96.  J. A. Starzyk and X. Fang, "System level design of a complex neural network for target recognition", IEEE Int. Conf. on Neural Network Applications to Signal Processing, (Singapore, 1993).

97.  J. A. Starzyk and C.-H. Chen, "A VLSI Inner Product Processor with Built-in Self Test for Real Time DSP Applications", Int. Conf. on Signal Proc. Applications and Technology, (Santa Clara, CA, 1993).

98.  J. A. Starzyk and C. H. Chen, "A One Dimensional Processor Array for LU Decomposition", Proc. IEEE Int. Workshop on Intelligent Signal Processing and Communication Syst. (Taipei, Taiwan, ROC, 1992).

99.  J. A. Starzyk and N. Ansari, "Feedforward Neural Network for Handwritten Character Recognition", Proc. IEEE Int. Symp. Circuits and Systems (San Diego, CA, 1992).

100.                      J. A. Starzyk and H. Dai, "Noninvasive Voltage Measurement Through an On-Chip Test Structure", Proc. IEEE Int. Test Conference (Baltimore, MD, 1992).

101.                      J. A. Starzyk and S.K. Chai, "Vector Contour Representation for Object Recognition in Neural Networks", IEEE Int. Conf. Systems, Man, and Cybernetics, (Chicago, IL, 1992).

102.                      J. A. Starzyk and N. Ansari, "Distance Field Approach to Handwritten Character Recognition", Proc. Fifth Conf. on Neural Networks and Parallel Distributed Processing, (Fort Wayne, IN, 1992).

103.                      J. A. Starzyk and H. Dai, "Automated Testing Using Circuit Decomposition", Proc. IEEE Instr. Measurement Technology Conf. (Atlanta, GA, 1991).

104.                      J. A. Starzyk and X. Wu, "Approximation Using Linear Fitting Neural Network", Proc. Artificial Neural Networks in Engineering Conf. (St. Louis, MO, 1991).

105.                      J. A. Starzyk, "Neural Networks in Analog Fault Diagnosis", VII Riunione Annuale Dei Ricercatori, (Trani, Italy, 1991).

106.                      J. A. Starzyk and H. Dai, "A Decomposition Approach for Parameter Identification in Large Scale Networks," Proc. IEEE Int. Symp. Circuits and Systems (New Orleans, LA, 1990).

107.                      J. A. Starzyk and M. El-Gamal, "Artificial Neural Network for Testing Analog Circuits", Proc. IEEE Int. Symp. Circuits and Systems (New Orleans, LA, 1990).

108.                      J. A. Starzyk and M. Eshghi, "Highly Parallel Adaptive Filter," Proc. IEEE Int. Symp. Circuits and Systems (Portland, OR, 1989).

109.                      J. A. Starzyk and E. Sliwa, "Tolerances in Symbolic Network Analysis," Proc. IEEE Int. Symp. Circuits and Systems (Portland, OR, 1989) - invited paper.

110.                      J. A. Starzyk and H. Dai, "Time Domain Testing of Large Nonlinear Circuits," Proc. European Conf. Circuit Theory and Design, (Brighton, United Kingdom, 1989).

111.                      J. A. Starzyk and H. Dai, "Sensitivity Based Testing of Nonlinear Dynamic Circuits", Proc. IEEE Int. Symp. Circuits and Systems (Espoo, Finland, 1988).

112.                      J. A. Starzyk and M. A. El-Gamal, "Diagnosability of Analog Circuits a Graph Theoretical Approach", Proc. IEEE Int. Symp. Circuits and Systems (Espoo, Finland, 1988).

113.                      J. A. Starzyk and H. Dai, "Fault Diagnosis and Calibration of Large Analog Circuits", Proc. IEEE Int. Symp. Circuits and Systems (Espoo, Finland, 1988).

114.                      J. A. Starzyk and M. El-Gamal, "Fault Diagnosis of Nonlinear Resistive Circuits", Proc. 31st Midwest Symp. on Circuits and Systems (St. Louis, MO, 1988).

115.                      J. A. Starzyk and H. Dai, "Multifrequency Measurement of Testability in Analog Circuits", Proc. IEEE Int. Symp. Circuits and Systems (Philadelphia, PA, 1987).

116.                      J. A. Starzyk and M. A. El-Gamal, "An Optimization Approach to Fault Location in Analog Circuits", Proc. European Conf. Circuit Theory and Design (Prague, 1985).

117.                      J. A. Starzyk and V.S.R. Dandu, "Overlapped Multi-Bit Scanning Multiplier", Proc. IE: VLSI in Computers (Port Chester, NY, 1985).

118.                      J. A. Starzyk and H. Dai, "Element Evaluation in the Resistive Networks", Proc. 28th Midwest Symp. on Circuits and Systems (Louisville, Kentucky, 1985).

119.                      J. A. Starzyk and S. C. Rastogi, "Hierarchical Decomposition Approach to D.C. Power Flow Solution", Proc. 28th Midwest Symp. on Circuits and Systems (Louisville, Kentucky, 1985).

120.                      J. A. Starzyk and M. A. El-Gamal, "Topological Conditions for Element Evaluation", Proc. 28th Midwest Symp. on Circuits and Systems (Louisville, Kentucky, 1985).

121.                      J. A. Starzyk, "Decomposition Approach to a VLSI Symbolic Layout with Mixed Constraints", Proc. IEEE Int. Symp. Circuits and Systems (Montreal, 1984). pp. 457-460.

122.                      J. A. Starzyk and J. W. Bandler, "Design of Tests for Parameter Evaluation within Remote Inaccessible Faulty Subnetworks", Proc. IEEE Int. Symp. Circuits and Systems (Newport Beach, CA, 1983), pp. 1106-1109.

123.                      A. E. Salama, J. A. Starzyk and J. W. Bandler, "A Unified Decomposition Approach for Fault Location in Large Analog Circuits", Proc. European Conf. Circuit Theory and Design (Stuttgart, 1983).

124.                      J. A. Starzyk and J. W. Bandler, "Nodal Approach to Multiple-Fault Location in Analog Circuits", Proc. IEEE Int. Symp. Circuits and Systems (Rome, 1982), pp. 1136-1139.

125.                      J. W. Bandler, R. M. Biernacki, A. E. Salama and J. A. Starzyk, "Fault Isolation in Linear Analog Circuits Using the Ll Norm", Proc. IEEE Int. Symp. Circuits and Systems (Rome, 1982), pp. 1140-1143.

126.                      H. Gupta, J. W. Bandler, J. A. Starzyk and J. Sharma, "A Hierarchical Decomposition Approach for Network Analysis", Proc. IEEE Int. Symp. Circuits and Systems (Rome, 1982), pp. 643-646.

127.                      R. M. Biernacki and J. A. Starzyk, "A Test Generation Algorithm for Parameter Identification of Analog Circuits", Proc. European Conf. Circuit Theory and Design, (The Hague, 1981), pp. 993-997.

128.                      G. Centkowski, J. A. Starzyk and E. Sliwa, "Symbolic Analysis of Large LLS Networks by Means of Upward Hierarchical Analysis", Proc. European Conf. Circuit Theory and Design (The Hague, 1981), pp. 358-361.

129.                      A. Konczykowska and J. A. Starzyk, "Computer Justification of Upward Topological Analysis of Signal-Flow Graphs", Proc. European Conf. Circuit Theory and Design, (The Hague, 1981), pp. 464-467.

130.                      G. Centkowski, J. A. Starzyk and E. Sliwa, "Computer Implementation of Topological Methods in the Analysis of Large Networks", Proc. European Conf. Circuit Theory and Design (Warsaw, 1980), pp. 69-74.

131.                      A. Konczykowska and J. A. Starzyk, "Computer Analysis of Large Signal Flowgraphs by Hierarchical Decomposition Method", Proc. European Conf. Circuit Theory and Design (Warsaw, 1980), pp. 408-413.

132.                      R. M. Biernacki and J. A. Starzyk, "Sufficient Test Conditions for Parameter Identification of Analog Circuits Based on Voltage Measurements", Proc. European Conf. Circuit Theory and Design (Warsaw, 1980), pp. 233-241.

133.                      J. A. Starzyk, "An Efficient Cluster Algorithm", Proc. of 5th Czech-Polish Workshop on Circuit Theory (Podbierady, 1980).

134.                      J. A. Starzyk and E. Sliwa, "Topological Analysis by Hierarchic Decomposition Method", Fourth Int. Symp. on Network Theory (Ljubljana, 1979), pp. 155-160.

135.                      J. A. Starzyk and A. Konczykowska, "Hierarchical Decomposition of Signal-Flow Graphs", Third Int. Conf. Electronic Circuits (Prague, 1979), pp. 248-251.

136.                      J. A. Starzyk, "Advanced Topological Analysis", Proc. of 4th Polish-Czech Workshop on Circuit Theory (Bocheniec, 1979), pp. 90-94.

137.                      J. A. Starzyk, "The Distor Graphs", Proc. of 3rd Czech-Polish Workshop on Circuit Theory (Prenet, 1978).

138.                      J. A. Starzyk, "Topological Synthesis of Linear Network with Grounded Operational Amplifiers", Proc. of 2nd Polish-Czech Workshop on Circuit Theory (Czarlino, 1977), pp. 201-206.

139.                      J. A. Starzyk, "Edge Orientation in Topological Synthesis of Linear Networks", Fifth Symp. Mathematical Methods in Electrical Engineering, (Podlesice, 1976), (in Polish), pp. 169-179.

140.                      J. A. Starzyk, "Selected Topics in Topological Synthesis of Networks by the Method of Structural Numbers", Symp. for XXV Anniversary of Electrical Engineering Dept. (Warsaw, 1976), (in Polish), pp. 116-117.

141.                      J. A. Starzyk, "Topological Synthesis of Linear Active Networks with the Method of Structural Numbers", Proc. European Conf. Circuit Theory and Design (Genova, 1976), pp. 340-348.

142.                      J. A. Starzyk, "Problems in Topological Analysis", First National Conf. URSI (Warsaw, 1975), (in Polish), pp. 250-252.

143.                      J. A. Starzyk, "Topological Synthesis of Multivariable Network Functions", Third Int. Symp. on Network Theory (Split, 1975), pp. 555-564.

144.                      J. A. Starzyk, "Complement of Set of Trees", Eight Asilomar Conf. Circuits, Systems and Computers, (Pacific Grove), 1974, pp. 227-230.